SIWave parallel plate capacitor simulation

Reading on the internet, I see that it is possible to simulate a PCB modelling it as a large parallel plate capacitor and obtain the Impedance vs Frequency plots, where we can see the "spikes" towards the left side of the graph, something like this:-

How can I simulate this on SIwave? I tried the following:-

To have only 2 metal layers separated by a dielectric layer (setting this up using Layer Stack up editor) and then added a voltage source using the circuits components option in SIwave 17.2. But this seems to be wrong, and I obviously do not have any nets etc or a GND plane for that matter, so that I can have a potential difference between the plates.

Please suggest a method to obtain this simulation.

Thank you.


Sign In or Register to comment.