Thanks for posting your query on Ansys Learning Forum.
I would like to provide a very generic answer as I am not aware of your design completely.
To simulate the spiral inductor in HFSS, you should have always 2-ports defined. This means that for single sprial, there should be two ports with respect to return path or ground. HFSS requires closed loop formed with respect to return path and calculates the equivalent closed loop inductance of the net. Therefore it needs to model the return path, a shorter one is always recommended. Using HFSS and expression 1) you can extract loop inductance, by modelling the short at other port and forming a loop to get loop inductance.
If you have access to Ansys Q3D, it will help you to get loop as well as partial inductances.
I have attached a you tube link for your reference : Simulation of On-Chip Spiral Inductor Using Ansys Q3D — Lesson 3
Hope this helps. Thanks.