Thanks for the reply. I will re-run the simulations with that change. Any idea how that would affect the simulations? Would it add more parasitic resistance/inductance?

Also keep in mind these are differential ports - if they are represented as single ended ports, whether in ADS or AEDT Circuit, you will be shorting one side of the port to your system ground in the circuit model...

Yes. I set it up as differential ports using the differential snp box on ADS. But, thanks for confirming that point.