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June 26, 2022 at 4:36 pm
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June 27, 2022 at 5:22 pm
Guilin Sun
Ansys EmployeeINTERCONNECT你是怎么设置的?如果你用的是Copuler,很可能本身就有90度的差别。请参考这个例子 https://optics.ansys.com/hc/en-us/articles/360042323574-Circuit-simulation-incorporating-component-level-results
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June 28, 2022 at 7:35 am
tlyeer
Subscriber感谢指导。后面我发现原因了,是我在FDTD中提取S参数的时候,将Include group delay这个打勾了,所以出现两个结果相位不一致。所以请问老师,这个Include group delay 在提取S参数需要打勾吗,对于真实的器件S参数提取仿真是否需要选择这个Include group delay
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