Electronics

Electronics

Understanding the calculations behind the lumped RLC port

    • Samarth
      Subscriber
      Hi all. I am trying to simulate the effect of kinetic inductance of superconducting films on CPW resonator frequencies using HFSS (I am modelling the film as a set of zero thickness elements on the substrate, which for my case is silicon). This can be simulated using a surface inductance (in say, L_s pH/square). In order to do that, I was looking at using the lumped RLC port, but I am not sure how it does its calculations internally. My surface is a rectangular one with holes in it (think a design etched on a rectangular ground plane). Say the rectangle (the ground plane) is of dimensions l x w (along x,y axes respectively), and my current line is along the x-axis bisecting the rectangle (this might pass through some of the etched parts). If I use an RLC port with inductance of L_s x l / w, should this reduce to a surface inductance of L_s on all those surfaces? If not, how can I do this kind of simulation? I want to do Eigenmode simulations for this, and hence keeping a surface impedance which is frequency dependent is not possible. Thanks in advance for your help!
    • Praneeth
      Ansys Employee

      Hi Samarth,

      Thank you for reaching to us. We appreciate your patience on your query.
      Please go through “assigning lumped RLC boundaries”, “lumped RLC boundaries” sections of HFSS help document for detailed information on Lumped RLC boundaries.
      For more details you can also refer to introduction to HFSS getting started guide.

      Best regards,
      Praneeth.

Viewing 1 reply thread
  • You must be logged in to reply to this topic.